XC9572-15PQ100C

100-PQFP, high-performance CPLD, 1.6K, -0.5 to 7.0V, XC9572-15PQ100C

Rated 5 Rating 5 | reviews | Write a review

Price:: US $9.00~11.00 / piece [Get Latest Price]

Reference price:

Qty (lots)	Price/lot
	US $9.00~11.00

PartNumber:: XC9572-15PQ100C

Brand:: Xilinx, Inc - Xilinx | Pack: QFP | D/C: 10+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

Quantity:: piece

Total Price:: US $0

Place Order via Escrow Service

Sold By

Ms. lucky's store

(Hong Kong)

add to my favourite

100% Positive feedback

Detailed seller ratings

Visit Store

Contact Now

Esrcow Service

Place orders confidently and securely via it

Safe payments
Quick and easy transactions
Free service charges

Learn More >>

Previous Next

Products Upload time: 2012-03-22

From Other Seller

Part Number:XC9572-15PQ100C
US $9.00 - 11.00
AT25256AW-10SU-2.7

US $0.65 - 1.50 / Piece
(0) Remove
SIL9185ACTU

US $2.30 - 5.00 / Piece
(0) Remove
Quantity:

piece

Product Summary

The XC9572-15PQ100C is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. The XC9572-15PQ100C is comprised of four 36V18 Function Blocks, providing 1,600 usable gates with propagation delays of 7.5 ns.

Parametrics

XC9572-15PQ100C absolute maximum ratings: (1)Supply voltage relative to GND:-0.5 to 7.0V; (2)DC input voltage relative to GND:-0.5 to VCC + 0.5V; (3)Voltage applied to 3-state output with respect to GND:-0.5 to VCC + 0.5V; (4)Storage temperature:-65℃ to +150℃; (5)Max soldering temperature (10 s @ 1/16 in = 1.5 mm):+260℃.

Features

XC9572-15PQ100C features: (1)Extensive IEEE Std 1149.1 boundary-scan (JTAG) support; (2)Programmable power reduction mode in each macrocell; (3)Slew rate control on individual outputs; (4)User programmable ground pin capability; (5)Extended pattern security features for design protection; (6)High-drive 24 mA outputs; (7)3.3 V or 5 V I/O capability; (8)Advanced CMOS 5V FastFLASH technology; (9)Supports parallel programming of more than one XC9500 concurrently; (10)Available in 44-pin PLCC, 84-pin PLCC, 100-pin PQFP and 100-pin TQFP packages; (11)7.5 ns pin-to-pin logic delays on all pins; (12)fCNT to 125 MHz; (13)72 macrocells with 1,600 usable gates; (14)Up to 72 user I/O pins; (15)5 V in-system programmable (ISP); (16)Endurance of 10,000 program/erase cycles; (17)Program/erase over full commercial voltage and temperature range; (18)Enhanced pin-locking architecture; (19)Flexible 36V18 Function Block.